Documentation

Std.Tactic.BVDecide.Bitblast.BVExpr.Circuit.Impl.Operations.ZeroExtend

This module contains the implementation of a bitblaster for BitVec.zeroExtend.

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def Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend {α : Type} [Hashable α] [DecidableEq α] {newWidth : Nat} (aig : Sat.AIG α) (target : aig.ExtendTarget newWidth) :
Sat.AIG.RefVecEntry α newWidth
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    @[irreducible]
    def Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go {α : Type} [Hashable α] [DecidableEq α] (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) :
    Sat.AIG.RefVecEntry α newWidth
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      theorem Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go_le_size {α : Type} [Hashable α] [DecidableEq α] (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) :
      aig.decls.size ≤ (go aig w input newWidth curr hcurr s).aig.decls.size
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      theorem Std.Tactic.BVDecide.BVExpr.bitblast.blastZeroExtend.go_decl_eq {α : Type} [Hashable α] [DecidableEq α] (aig : Sat.AIG α) (w : Nat) (input : aig.RefVec w) (newWidth curr : Nat) (hcurr : curr ≤ newWidth) (s : aig.RefVec curr) (idx : Nat) (h1 : idx < aig.decls.size) (h2 : idx < (go aig w input newWidth curr hcurr s).aig.decls.size) :
      (go aig w input newWidth curr hcurr s).aig.decls[idx] = aig.decls[idx]
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      instance Std.Tactic.BVDecide.BVExpr.bitblast.instLawfulVecOperatorExtendTargetBlastZeroExtend {α : Type} [Hashable α] [DecidableEq α] :
      Sat.AIG.LawfulVecOperator α Sat.AIG.ExtendTarget fun {len : Nat} => blastZeroExtend