This module contains the implementation of a bitblaster for BitVec.mul
. The implemented
circuit mirrors the behavior of BitVec.mulRec
.
Note that the implementation performs a symbolic branch over the bits of the right hand side.
Thus if the right hand side is (partially) known through constant propagation etc. the symbolic
branches will be (partially) constant folded away by the AIG optimizer. The preprocessing of
blastMul
ensures that the value with more known bits always end up on the right hand side for
this reason.
def
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(input : aig.BinaryRefVec w)
:
Equations
- One or more equations did not get rendered due to their size.
Instances For
def
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.blast
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(input : aig.BinaryRefVec w)
:
Equations
- One or more equations did not get rendered due to their size.
Instances For
@[irreducible]
def
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(lhs rhs : aig.RefVec w)
(curr : Nat)
(acc : aig.RefVec w)
:
Equations
- One or more equations did not get rendered due to their size.
Instances For
@[irreducible]
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go_le_size
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(curr : Nat)
(acc lhs rhs : aig.RefVec w)
:
aig.decls.size ≤ (Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go aig lhs rhs curr acc).aig.decls.size
@[irreducible]
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go_decl_eq
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(curr : Nat)
(acc lhs rhs : aig.RefVec w)
(idx : Nat)
(h1 : idx < aig.decls.size)
(h2 : idx < (Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go aig lhs rhs curr acc).aig.decls.size)
:
(Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go aig lhs rhs curr acc).aig.decls[idx] = aig.decls[idx]
instance
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.instLawfulVecOperatorBVBitBinaryRefVecBlast :
Std.Sat.AIG.LawfulVecOperator Std.Tactic.BVDecide.BVBit Std.Sat.AIG.BinaryRefVec fun {len : Nat} =>
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.blast
instance
Std.Tactic.BVDecide.BVExpr.bitblast.instLawfulVecOperatorBVBitBinaryRefVecBlastMul :
Std.Sat.AIG.LawfulVecOperator Std.Tactic.BVDecide.BVBit Std.Sat.AIG.BinaryRefVec fun {len : Nat} =>
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul