This module contains the verification of the bitblaster for symbolic BitVec
values from
Impl.Var
.
@[irreducible]
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go_get_aux
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(a curr : Nat)
(hcurr : curr ≤ w)
(s : aig.RefVec curr)
(idx : Nat)
(hidx : idx < curr)
(hfoo : aig.decls.size ≤ (Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go aig w a curr s hcurr).aig.decls.size)
:
(Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go aig w a curr s hcurr).vec.get idx ⋯ = (s.get idx hidx).cast hfoo
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go_get
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(a curr : Nat)
(hcurr : curr ≤ w)
(s : aig.RefVec curr)
(idx : Nat)
(hidx : idx < curr)
:
(Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go aig w a curr s hcurr).vec.get idx ⋯ = (s.get idx hidx).cast ⋯
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go_denote_mem_prefix
{assign : Std.Tactic.BVDecide.BVBit → Bool}
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(idx : Nat)
(hidx : idx ≤ w)
(s : aig.RefVec idx)
(a start : Nat)
(hstart : start < aig.decls.size)
:
⟦assign,
{ aig := (Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go aig w a idx s hidx).aig,
ref := { gate := start, hgate := ⋯ } }⟧ = ⟦assign, { aig := aig, ref := { gate := start, hgate := hstart } }⟧
@[irreducible]
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go_denote_eq
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(a : Nat)
(assign : Std.Tactic.BVDecide.BVExpr.Assignment)
(curr : Nat)
(hcurr : curr ≤ w)
(s : aig.RefVec curr)
(idx : Nat)
(hidx1 : idx < w)
:
curr ≤ idx →
⟦assign.toAIGAssignment,
{ aig := (Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go aig w a curr s hcurr).aig,
ref := (Std.Tactic.BVDecide.BVExpr.bitblast.blastVar.go aig w a curr s hcurr).vec.get idx hidx1 }⟧ = (Std.Tactic.BVDecide.BVExpr.eval assign (Std.Tactic.BVDecide.BVExpr.var a)).getLsbD idx
@[simp]
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.denote_blastVar
{w : Nat}
(aig : Std.Sat.AIG Std.Tactic.BVDecide.BVBit)
(var : Std.Tactic.BVDecide.BVExpr.bitblast.BVVar w)
(assign : Std.Tactic.BVDecide.BVExpr.Assignment)
(idx : Nat)
(hidx : idx < w)
:
⟦assign.toAIGAssignment,
{ aig := (Std.Tactic.BVDecide.BVExpr.bitblast.blastVar aig var).aig,
ref := (Std.Tactic.BVDecide.BVExpr.bitblast.blastVar aig var).vec.get idx hidx }⟧ = (Std.Tactic.BVDecide.BVExpr.eval assign (Std.Tactic.BVDecide.BVExpr.var var.ident)).getLsbD idx