Ordered vector spaces #
@[instance 100]
instance
PosSMulMono.toPosSMulReflectLE
{๐ : Type u_1}
{G : Type u_2}
[Semifield ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[PartialOrder G]
[MulAction ๐ G]
[PosSMulMono ๐ G]
:
PosSMulReflectLE ๐ G
@[instance 100]
instance
PosSMulStrictMono.toPosSMulReflectLT
{๐ : Type u_1}
{G : Type u_2}
[Semifield ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[MulActionWithZero ๐ G]
[PosSMulStrictMono ๐ G]
:
PosSMulReflectLT ๐ G
theorem
inv_smul_le_iff_of_neg
{๐ : Type u_1}
{G : Type u_2}
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
{bโ bโ : G}
[PosSMulMono ๐ G]
(h : a < 0)
:
theorem
smul_inv_le_iff_of_neg
{๐ : Type u_1}
{G : Type u_2}
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
{bโ bโ : G}
[PosSMulMono ๐ G]
(h : a < 0)
:
def
OrderIso.smulRightDual
{๐ : Type u_1}
(G : Type u_2)
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
[PosSMulMono ๐ G]
(ha : a < 0)
:
Left scalar multiplication as an order isomorphism.
Equations
- OrderIso.smulRightDual G ha = { toEquiv := (Equiv.smulRight โฏ).trans OrderDual.toDual, map_rel_iff' := โฏ }
Instances For
@[simp]
theorem
OrderIso.smulRightDual_symm_apply
{๐ : Type u_1}
(G : Type u_2)
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
[PosSMulMono ๐ G]
(ha : a < 0)
(aโ : Gแตแต)
:
@[simp]
theorem
OrderIso.smulRightDual_apply
{๐ : Type u_1}
(G : Type u_2)
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
[PosSMulMono ๐ G]
(ha : a < 0)
(aโ : G)
:
theorem
inv_smul_lt_iff_of_neg
{๐ : Type u_1}
{G : Type u_2}
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
{bโ bโ : G}
[PosSMulStrictMono ๐ G]
(h : a < 0)
:
theorem
smul_inv_lt_iff_of_neg
{๐ : Type u_1}
{G : Type u_2}
[Field ๐]
[LinearOrder ๐]
[IsStrictOrderedRing ๐]
[AddCommGroup G]
[PartialOrder G]
[IsOrderedAddMonoid G]
[Module ๐ G]
{a : ๐}
{bโ bโ : G}
[PosSMulStrictMono ๐ G]
(h : a < 0)
:
Positivity extension for HSMul, i.e. (_ โข _).
Equations
- One or more equations did not get rendered due to their size.