This module contains the verification of the bitblaster for BitVec.mul from Impl.Operations.Mul.
@[irreducible]
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.go_denote_eq
{w : Nat}
(aig : Sat.AIG BVBit)
(curr : Nat)
(hcurr : curr + 1 ≤ w)
(acc lhs rhs : aig.RefVec w)
(lexpr rexpr : BitVec w)
(assign : Assignment)
(hleft :
∀ (idx : Nat) (hidx : idx < w), ⟦assign.toAIGAssignment, { aig := aig, ref := lhs.get idx hidx }⟧ = lexpr.getLsbD idx)
(hright :
∀ (idx : Nat) (hidx : idx < w), ⟦assign.toAIGAssignment, { aig := aig, ref := rhs.get idx hidx }⟧ = rexpr.getLsbD idx)
(hacc :
∀ (idx : Nat) (hidx : idx < w),
⟦assign.toAIGAssignment, { aig := aig, ref := acc.get idx hidx }⟧ = (lexpr.mulRec rexpr curr).getLsbD idx)
(idx : Nat)
(hidx : idx < w)
:
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.blastMul.denote_blast
{w : Nat}
(aig : Sat.AIG BVBit)
(lhs rhs : BitVec w)
(assign : Assignment)
(input : aig.BinaryRefVec w)
(hleft :
∀ (idx : Nat) (hidx : idx < w),
⟦assign.toAIGAssignment, { aig := aig, ref := input.lhs.get idx hidx }⟧ = lhs.getLsbD idx)
(hright :
∀ (idx : Nat) (hidx : idx < w),
⟦assign.toAIGAssignment, { aig := aig, ref := input.rhs.get idx hidx }⟧ = rhs.getLsbD idx)
(idx : Nat)
(hidx : idx < w)
:
theorem
Std.Tactic.BVDecide.BVExpr.bitblast.denote_blastMul
{w : Nat}
(aig : Sat.AIG BVBit)
(lhs rhs : BitVec w)
(assign : Assignment)
(input : aig.BinaryRefVec w)
(hleft :
∀ (idx : Nat) (hidx : idx < w),
⟦assign.toAIGAssignment, { aig := aig, ref := input.lhs.get idx hidx }⟧ = lhs.getLsbD idx)
(hright :
∀ (idx : Nat) (hidx : idx < w),
⟦assign.toAIGAssignment, { aig := aig, ref := input.rhs.get idx hidx }⟧ = rhs.getLsbD idx)
(idx : Nat)
(hidx : idx < w)
: